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hardware:jtag 2008/08/17 01:55 | hardware:jtag 2017/09/06 18:38 current | ||
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* You need a JTAG cable | * You need a JTAG cable | ||
- | ===== JTAG Interface scheme for DNS-323 ===== | + | Two types of jtag cables are discussed here: |
+ | 1: The "Wiggler" style, which is basically a conversion between the jtag interface on the embedded system and the parralel (printer) port on your PC. | ||
+ | 2: The "Amontec JTAGKey Tiny" (other commercially models may or may not work), which provides a USB connection at the PC side. | ||
+ | Comparison: pro method 1: cheaper, Pro method 2: less soldering (faster?) | ||
- | {{hardware:dns-323-jtag.pdf| JTAG Port Pinout and Wiggler style Programmer}} | ||
+ | ===== JTAG Pinout Reference ===== | ||
+ | **TOP VIEW** | ||
+ | **Note Pin 1 is square pin** | ||
+ | ^ Signal ^ Pin ^ Pin ^ Signal ^ | ||
+ | | sRST| 9| 10| TCK| | ||
+ | | TDO| 7| 8| TCK| | ||
+ | | GND| 5| 6| TMS| | ||
+ | | GND| 3| 4| TDI| | ||
+ | | Vcc| 1| 2| nTRST| | ||
- | ==== Amontec JTAGKey Tiny ==== | + | **Note nTRST must be sent a buffered high signal to use JTAG** |
- | [http://www.amontec.com/jtagkey-tiny.shtml| JTAGKey Tiny] | + | |
- | Solder 4K7 Ohm resistors @ R202 R201 R200 | + | Be aware that this pinout seems to be based on the DNS 323 version B2 and the CH3SNAS. The DNS-323 version A1 has the same space for a header, but the location of the surrounding resistors is different. This might or might not have consequences for the validity of the pinout as above. (Anyone: more information on the A1 rev.?) |
- | Connect JTAG pins just like the Wrigler port, and also bridge R199 (EN pin to VCC) to enable JTAG. | + | Rev A1 is the same pinout, smd resistors are already attached, just add header. |
- | openocd.cfg: | ||
+ | |||
+ | ===== JTAG Interface scheme for DNS-323 with the Wiggler port===== | ||
+ | See the attached pinout: | ||
+ | {{:hardware:dns-323-jtag.png}} | ||
+ | |||
+ | |||
+ | |||
+ | ==== openocd configuration file for the Wiggler method ==== | ||
+ | |||
+ | openocd.cfg | ||
<code> | <code> | ||
+ | cat openocd.cfg | ||
+ | #daemon configuration | ||
telnet_port 4444 | telnet_port 4444 | ||
gdb_port 3333 | gdb_port 3333 | ||
- | interface ft2232 | + | #interface |
- | ft2232_device_desc "Amontec JTAGkey" | + | interface parport |
- | ft2232_layout jtagkey | + | parport_port 0x378 |
- | ft2232_vid_pid 0x0403 0xcff8 | + | parport_cable wiggler |
- | jtag_speed 3 | + | #parport_cable old_amt_wiggler |
+ | jtag_speed 1 | ||
+ | #use combined on interfaces or targets that can't set TRST/SRST separately | ||
+ | #reset_config trst_and_srst srst_pulls_trst | ||
+ | #reset_config trst_only | ||
+ | #reset_config trst_and_srst combined | ||
reset_config srst_only | reset_config srst_only | ||
+ | |||
+ | #jtag scan chain | ||
+ | #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) | ||
jtag_device 4 0x1 0xf 0xe | jtag_device 4 0x1 0xf 0xe | ||
Line 47: | Line 75: | ||
# planing with flash code - work in progress | # planing with flash code - work in progress | ||
- | #working_area 0 0x00400000 0x40000 nobackup | + | working_area 0 0x00400000 0x40000 nobackup |
# driver addr size chip_width bus_width options | # driver addr size chip_width bus_width options | ||
- | flash bank cfi 0xff800000 0x800000 1 2 0 | + | flash bank cfi 0xff800000 0x400000 1 2 0 |
#target configuration | #target configuration | ||
Line 57: | Line 85: | ||
sleep 500 | sleep 500 | ||
halt | halt | ||
- | |||
</code> | </code> | ||
- | ===== JTAG Pinout Reference ===== | ||
- | **TOP VIEW** | ||
- | **Note Pin 1 is square pin** | ||
- | ^ Signal ^ Pin ^ Pin ^ Signal ^ | + | ===== JTAG Interface scheme for DNS-323 with the Amontec JTAGKey Tiny ===== |
- | | sRST| 9| 10| TCK| | + | [[http://www.amontec.com/jtagkey-tiny.shtml| JTAGKey Tiny]] |
- | | TDO| 7| 8| TCK| | + | |
- | | GND| 5| 6| TMS| | + | |
- | | GND| 3| 4| TDI| | + | |
- | | Vcc| 1| 2| nTRST| | + | |
- | **Note nTRST must be sent a buffered high signal to use JTAG** | + | Solder 47 KOhm resistors @ R202 R201 R200 |
+ | Connect JTAG pins just like the Wiggler port, and also bridge R199 (EN pin to VCC) to enable JTAG. | ||
+ | Refer to the top half of the pdf as attached in the previous section. | ||
+ | Pinout of the jtagkey tiny is available [[http://www.amontec.com/jtag_pinout.shtml| here]] | ||
+ | ==== openocd configuration file for the Amontec JTAGKey Tiny ==== | ||
- | ===== OpenOCD ===== | + | openocd.cfg |
- | + | ||
- | ==== openocd.cfg ==== | + | |
<code> | <code> | ||
- | cat openocd.cfg | ||
- | #daemon configuration | ||
telnet_port 4444 | telnet_port 4444 | ||
gdb_port 3333 | gdb_port 3333 | ||
- | #interface | + | interface ft2232 |
- | interface parport | + | ft2232_device_desc "Amontec JTAGkey" |
- | parport_port 0x378 | + | ft2232_layout jtagkey |
- | parport_cable wiggler | + | ft2232_vid_pid 0x0403 0xcff8 |
- | #parport_cable old_amt_wiggler | + | jtag_speed 3 |
- | jtag_speed 1 | + | |
- | #use combined on interfaces or targets that can't set TRST/SRST separately | + | |
- | #reset_config trst_and_srst srst_pulls_trst | + | |
- | #reset_config trst_only | + | |
- | #reset_config trst_and_srst combined | + | |
- | reset_config srst_only | + | |
- | #jtag scan chain | + | reset_config srst_only |
- | #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) | + | |
jtag_device 4 0x1 0xf 0xe | jtag_device 4 0x1 0xf 0xe | ||
Line 106: | Line 119: | ||
# planing with flash code - work in progress | # planing with flash code - work in progress | ||
- | working_area 0 0x00400000 0x40000 nobackup | + | #working_area 0 0x00400000 0x40000 nobackup |
# driver addr size chip_width bus_width options | # driver addr size chip_width bus_width options | ||
- | flash bank cfi 0xff800000 0x400000 1 2 0 | + | flash bank cfi 0xff800000 0x800000 1 2 0 |
#target configuration | #target configuration | ||
Line 116: | Line 129: | ||
sleep 500 | sleep 500 | ||
halt | halt | ||
+ | |||
</code> | </code> | ||
+ | |||
+ | |||
+ | ===== OpenOCD ===== | ||
+ | |||
==== Running OpenOCD ==== | ==== Running OpenOCD ==== | ||
Line 153: | Line 171: | ||
</code> | </code> | ||
- | ===== TODO ====== | + | ===== TODO ===== |
* The flash code in OPENOCD does not understand CFI mode 2 access. However this looks to be easy to fix. There is an early patch that attempted to address this but was never added into the project release. This code provides a good starting point. | * The flash code in OPENOCD does not understand CFI mode 2 access. However this looks to be easy to fix. There is an early patch that attempted to address this but was never added into the project release. This code provides a good starting point. | ||
===== Links ===== | ===== Links ===== | ||
- | * [[http://forum.dsmg600.info/t250-DNS323-JTAG-Pinout-interface-details.html|Forum thread]] | + | * [[http://dns323.kood.org/forum/t250-DNS323-JTAG-Pinout-interface-details.html|Forum thread]] |