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Table of Contents
JTAG port on the DNS-323
WARNING: attaching a JTAG port will certainly void your warranty and could destroy your unit.
Please feel free to update, cleanup or correct this page.
What is this?
This document shows how to use the JTAG port on the DNS-323.
Requisites
- You need openocd OpenOCDinstalled on a linux box
- You can get the sources svn checkout svn://svn.berlios.de/openocd/trunk
- You need a JTAG cable
JTAG Interface scheme for DNS-323
JTAG Pinout Reference
TOP VIEW Note Pin 1 is square pin
Signal | Pin | Pin | Signal |
---|---|---|---|
sRST | 9 | 10 | TCK |
TDO | 7 | 8 | TCK |
GND | 5 | 6 | TMS |
GND | 3 | 4 | TDI |
Vcc | 1 | 2 | nTRST |
Note nTRST must be sent a buffered high signal to use JTAG
OpenOCD
openocd.cfg
cat openocd.cfg #daemon configuration telnet_port 4444 gdb_port 3333 #interface interface parport parport_port 0x378 parport_cable wiggler #parport_cable old_amt_wiggler jtag_speed 1 #use combined on interfaces or targets that can't set TRST/SRST separately #reset_config trst_and_srst srst_pulls_trst #reset_config trst_only #reset_config trst_and_srst combined reset_config srst_only #jtag scan chain #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) jtag_device 4 0x1 0xf 0xe jtag_nsrst_delay 1200 jtag_ntrst_delay 1200 #target configuration daemon_startup reset #target <type> <endianness> <startup mode> <chainpos> <variant> target feroceon little run_and_halt 0 run_and_halt_time 0 500 # planing with flash code - work in progress working_area 0 0x00400000 0x40000 nobackup # driver addr size chip_width bus_width options flash bank cfi 0xff800000 0x400000 1 2 0
Running OpenOCD
- Start the program
openocd -d3 --log_output log.txt
- Telnet to the debug interface
telnet localhost 4444 Trying 127.0.0.1... Connected to localhost. Escape character is '^]'. Open On-Chip Debugger
- Memory dump of the U-Boot flash
> mdb 0xfffd0000 0x10 0xfffd0000: 12 00 00 ea 14 f0 9f e5 0xfffd0008: 14 f0 9f e5 14 f0 9f e5
- Dump Marvell» U-BOOT prompt in firmware example
> mdb 0xfffea826 0x8 0xfffea826: 72 76 65 6c 6c 3e 3e 20
- Reset CPU
Target 0 halted target halted in ARM state due to debug request, current mode: Supervisor cpsr: 0x200000d3 pc: 0x00f12a2c MMU: disabled, D-Cache: disabled, I-Cache: enabled
TODO
- The flash code in OPENOCD does not understand CFI mode 2 access. However this looks to be easy to fix. There is an early patch that attempted to address this but was never added into the project release. This code provides a good starting point.